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Searched refs:CSR_MTVEC (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h357 #define CSR_MTVEC 0x305 macro
400 # define CSR_TVEC CSR_MTVEC
/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h193 #define CSR_MTVEC 0x305 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h157 #define CSR_MTVEC 0x305 macro
H A Dcpu.c780 CSR_MTVEC, in riscv_cpu_dump_state()
H A Dcsr.c2203 qemu_log_mask(LOG_UNIMP, "CSR_MTVEC: reserved mode not supported\n"); in read_mcountinhibit()
5053 [CSR_MTVEC] = { "mtvec", any, read_mtvec, write_mtvec },