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Searched refs:CSR_MISC (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/target/loongarch/
H A Dcpu-csr.h30 FIELD(CSR_MISC, VA32, 0, 4)
31 FIELD(CSR_MISC, DRDTL, 4, 4)
32 FIELD(CSR_MISC, RPCNTL, 8, 4)
33 FIELD(CSR_MISC, ALCL, 12, 4)
34 FIELD(CSR_MISC, DWPL, 16, 3)
H A Dcpu.h312 uint64_t CSR_MISC;
461 if (plv >= 1 && (FIELD_EX64(env->CSR_MISC, CSR_MISC, VA32) & (1 << plv))) { in is_la64()
323 uint64_t CSR_MISC; global() member
H A Dmachine.c201 VMSTATE_UINT64(env.CSR_MISC, LoongArchCPU),
H A Dcpu.c450 env->CSR_MISC = 0; in loongarch_la464_initfn()
/openbmc/qemu/target/loongarch/tcg/
H A Dop_helper.c96 if (extract64(env->CSR_MISC, R_CSR_MISC_DRDTL_SHIFT + plv, 1)) { in helper_rdtime_d()
/openbmc/qemu/target/loongarch/kvm/
H A Dkvm.c173 &env->CSR_MISC); in kvm_loongarch_get_csr()
343 &env->CSR_MISC); in kvm_loongarch_put_csr()