Searched refs:CSR_MIDELEG (Results 1 – 4 of 4) sorted by relevance
191 #define CSR_MIDELEG 0x303 macro
155 #define CSR_MIDELEG 0x303 macro
546 CSR_MIDELEG, in riscv_cpu_dump_state()
5868 [CSR_MIDELEG] = { "mideleg", smode, NULL, NULL, rmw_mideleg },