Searched refs:CSR_MHPMEVENT31H (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/target/riscv/ | ||
| H A D | cpu_bits.h | 468 #define CSR_MHPMEVENT31H 0x73f macro |
| H A D | csr.c | 5589 [CSR_MHPMEVENT31H] = { "mhpmevent31h", sscofpmf_32, read_mhpmeventh, |