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Searched refs:CSR_MHPMEVENT20 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h212 #define CSR_MHPMEVENT20 0x334 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h424 #define CSR_MHPMEVENT20 0x334 macro
H A Dcsr.c5473 [CSR_MHPMEVENT20] = { "mhpmevent20", any, read_mhpmevent,