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Searched refs:CSR_MHPMCOUNTER27 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h284 #define CSR_MHPMCOUNTER27 0xb1b macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h391 #define CSR_MHPMCOUNTER27 0xb1b macro
H A Dcsr.c5333 [CSR_MHPMCOUNTER27] = { "mhpmcounter27", mctr, read_hpmcounter,