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Searched refs:CSR_MHPMCOUNTER18 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h275 #define CSR_MHPMCOUNTER18 0xb12 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h382 #define CSR_MHPMCOUNTER18 0xb12 macro
H A Dcsr.c5315 [CSR_MHPMCOUNTER18] = { "mhpmcounter18", mctr, read_hpmcounter,