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Searched refs:CSR_MHPMCOUNTER17 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h274 #define CSR_MHPMCOUNTER17 0xb11 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h384 #define CSR_MHPMCOUNTER17 0xb11 macro
H A Dcsr.c5402 [CSR_MHPMCOUNTER17] = { "mhpmcounter17", mctr, read_hpmcounter,