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Searched refs:CSR_MCYCLECFG (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h401 #define CSR_MCYCLECFG 0x321 macro
H A Dcsr.c5348 [CSR_MCYCLECFG] = { "mcyclecfg", smcntrpmf, read_mcyclecfg,