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Searched refs:CSR_MCYCLE (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h258 #define CSR_MCYCLE 0xb00 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h136 #define CSR_MCYCLE 0xb00 macro
H A Dcsr.c1078 int ctr_idx = csrno - CSR_MCYCLE; in write_mhpmcounter()
1166 if (csrno >= CSR_MCYCLE && csrno <= CSR_MHPMCOUNTER31) { in read_hpmcounter()
1167 ctr_index = csrno - CSR_MCYCLE; in read_hpmcounter()
4939 [CSR_MCYCLE] = { "mcycle", any, read_hpmcounter,