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Searched refs:CSR_MCONTEXT (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h359 #define CSR_MCONTEXT 0x7a8 macro
H A Dcsr.c5233 [CSR_MCONTEXT] = { "mcontext", debug, read_mcontext, write_mcontext },