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Searched refs:CSR_MCAUSE (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h362 #define CSR_MCAUSE 0x342 macro
404 # define CSR_CAUSE CSR_MCAUSE
/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h226 #define CSR_MCAUSE 0x342 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h168 #define CSR_MCAUSE 0x342 macro
H A Dcpu.c786 CSR_MCAUSE, in riscv_cpu_dump_state()
H A Dcsr.c5068 [CSR_MCAUSE] = { "mcause", any, read_mcause, write_mcause },