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Searched refs:CSR_HSTATEEN1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h253 #define CSR_HSTATEEN1 0x60D macro
H A Dcsr.c5043 [CSR_HSTATEEN1] = { "hstateen1", hstateen, read_hstateen,