Home
last modified time | relevance | path

Searched refs:CSR_HIP (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h324 #define CSR_HIP 0x644 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h242 #define CSR_HIP 0x644 macro
H A Dcsr.c5211 [CSR_HIP] = { "hip", hmode, NULL, NULL, rmw_hip,