Searched refs:CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ (Results 1 – 8 of 8) sorted by relevance
278 #define CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ (0x00000008) macro
72 _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in _il_grab_nic_access()2571 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in il_rx_queue_update_write_ptr()2726 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in il_txq_update_write_ptr()
2027 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in _il_release_nic_access()
5431 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in __il4965_down()
276 #define CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ (0x00000008) macro
1286 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in _iwl_trans_pcie_stop_device()1511 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in iwl_pcie_d3_complete_suspend()1592 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in iwl_trans_pcie_d3_resume()1614 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in iwl_trans_pcie_d3_resume()2173 u32 write = CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ; in __iwl_trans_pcie_grab_nic_access()2276 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in iwl_trans_pcie_release_nic_access()
100 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in iwl_pcie_txq_inc_wr_ptr()180 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in iwl_pcie_clear_cmd_in_flight()
186 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); in iwl_pcie_rxq_inc_wr_ptr()