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Searched refs:CSR_DMW1_BASE (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/loongarch/include/asm/
H A Daddrspace.h32 #define CACHE_BASE CSR_DMW1_BASE
H A Dloongarch.h868 #define CSR_DMW1_BASE (CSR_DMW1_VSEG << DMW_PABITS) macro
869 #define CSR_DMW1_INIT (CSR_DMW1_BASE | CSR_DMW1_MAT | CSR_DMW1_PLV0)