Searched refs:CSCR (Results 1 – 6 of 6) sorted by relevance
53 return (( CSCR>>15)&1) ? get_mcuPLLCLK()>>1 : get_mcuPLLCLK(); in get_FCLK()59 u32 bclkdiv = (( CSCR >> 10 ) & 0xf) + 1; in get_HCLK()
31 ldr r0, =CSCR43 write32 CSCR, ACFG_CSCR_VAL|CSCR_MPLL_RESTART|CSCR_SPLL_RESTART
132 CSCR = 0x74, /* Chip Status and Configuration Register. */ enumerator454 uint16_t CSCR; member1208 s->CSCR = CSCR_F_LINK_100 | CSCR_HEART_BIT | CSCR_LD; in rtl8139_reset_phy()2498 uint16_t ret = s->CSCR; in rtl8139_CSCR_read()3042 case CSCR: in rtl8139_io_readw()3197 VMSTATE_UINT16(CSCR, RTL8139State),
124 CSCR=0x74, /* chip status and configuration register */ enumerator
80 DEFINE(CSCR, IMX_PLL_BASE + offsetof(struct pll_regs, cscr)); in main()
92 #define CSCR __REG(IMX_PLL_BASE) /* Clock Source Control Register */ macro