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Searched refs:CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h3091 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 0x0000000a macro
H A Dgfx_7_2_sh_mask.h2972 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 0xa macro
H A Dgfx_8_0_sh_mask.h3586 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 0xa macro
H A Dgfx_8_1_sh_mask.h4108 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 0xa macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1071 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h937 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_9_1_sh_mask.h970 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h987 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1570 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h6467 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h7242 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h6555 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h6794 #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT … macro