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Searched refs:CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2897 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT 0x00000010 macro
H A Dgfx_7_2_sh_mask.h3184 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT 0x10 macro
H A Dgfx_8_1_sh_mask.h4320 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT 0x10 macro
H A Dgfx_8_0_sh_mask.h3798 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT 0x10 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1292 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_9_1_sh_mask.h1191 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h1158 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h1208 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1791 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h6635 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h6776 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h7410 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h7042 #define CP_ROQ_IB2_STAT__ROQ_WPTR_INDIRECT2__SHIFT … macro