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Searched refs:CP_ROQ2_THRESHOLDS__R2_IB1_START_MASK (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2882 #define CP_ROQ2_THRESHOLDS__R2_IB1_START_MASK 0x000000ffL macro
H A Dgfx_7_2_sh_mask.h3133 #define CP_ROQ2_THRESHOLDS__R2_IB1_START_MASK 0xff macro
H A Dgfx_8_0_sh_mask.h3747 #define CP_ROQ2_THRESHOLDS__R2_IB1_START_MASK 0xff macro
H A Dgfx_8_1_sh_mask.h4269 #define CP_ROQ2_THRESHOLDS__R2_IB1_START_MASK 0xff macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1235 #define CP_ROQ2_THRESHOLDS__R2_IB1_START_MASK … macro
H A Dgc_9_2_1_sh_mask.h1101 #define CP_ROQ2_THRESHOLDS__R2_IB1_START_MASK … macro
H A Dgc_9_1_sh_mask.h1134 #define CP_ROQ2_THRESHOLDS__R2_IB1_START_MASK … macro
H A Dgc_9_4_3_sh_mask.h1151 #define CP_ROQ2_THRESHOLDS__R2_IB1_START_MASK … macro
H A Dgc_9_4_2_sh_mask.h1734 #define CP_ROQ2_THRESHOLDS__R2_IB1_START_MASK … macro