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Searched refs:CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2881 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT 0x00000010 macro
H A Dgfx_7_2_sh_mask.h3138 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT 0x10 macro
H A Dgfx_8_0_sh_mask.h3752 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT 0x10 macro
H A Dgfx_8_1_sh_mask.h4274 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT 0x10 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1233 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h1099 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT … macro
H A Dgc_9_1_sh_mask.h1132 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h1149 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1732 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h6582 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h7357 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h6718 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h6984 #define CP_ROQ2_THRESHOLDS__R1_IB2_START__SHIFT … macro