Home
last modified time | relevance | path

Searched refs:CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c4873 data &= ~(CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK | CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK); in gfx_v11_0_update_coarse_grain_clock_gating()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2848 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK 0x0000ffffL macro
H A Dgfx_7_2_sh_mask.h3079 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK 0xffff macro
H A Dgfx_8_1_sh_mask.h4215 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK 0xffff macro
H A Dgfx_8_0_sh_mask.h3693 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK 0xffff macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1219 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK … macro
H A Dgc_9_1_sh_mask.h1118 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK … macro
H A Dgc_9_2_1_sh_mask.h1085 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK … macro
H A Dgc_9_4_3_sh_mask.h1135 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK … macro
H A Dgc_9_4_2_sh_mask.h1718 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK … macro
H A Dgc_11_0_0_sh_mask.h6571 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK … macro
H A Dgc_10_1_0_sh_mask.h6707 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK … macro
H A Dgc_11_0_3_sh_mask.h7346 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK … macro
H A Dgc_10_3_0_sh_mask.h6973 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY_MASK … macro