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Searched refs:CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2717 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT 0x00000016 macro
H A Dgfx_7_2_sh_mask.h1050 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT 0x16 macro
H A Dgfx_8_0_sh_mask.h1368 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT 0x16 macro
H A Dgfx_8_1_sh_mask.h1892 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT 0x16 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10694 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h11980 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT … macro
H A Dgc_9_1_sh_mask.h12175 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h13702 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1996 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h15101 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h17253 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h17599 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h15859 #define CP_RB0_CNTL__MIN_IB_AVAILSZ__SHIFT … macro