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Searched refs:CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h1484 #define CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT 0x1e macro
H A Dgfx_8_1_sh_mask.h2436 #define CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT 0x1e macro
H A Dgfx_8_0_sh_mask.h1914 #define CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT 0x1e macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11259 #define CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT … macro
H A Dgc_9_1_sh_mask.h12739 #define CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h12524 #define CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h14466 #define CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h2659 #define CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h15745 #define CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h18228 #define CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h17936 #define CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h16576 #define CP_PQ_WPTR_POLL_CNTL__POLL_ACTIVE__SHIFT … macro