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Searched refs:CP_PQ_STATUS__DOORBELL_ENABLE_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h1979 #define CP_PQ_STATUS__DOORBELL_ENABLE_MASK 0x2 macro
H A Dgfx_8_0_sh_mask.h2495 #define CP_PQ_STATUS__DOORBELL_ENABLE_MASK 0x2 macro
H A Dgfx_8_1_sh_mask.h3017 #define CP_PQ_STATUS__DOORBELL_ENABLE_MASK 0x2 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11934 #define CP_PQ_STATUS__DOORBELL_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h13142 #define CP_PQ_STATUS__DOORBELL_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h13364 #define CP_PQ_STATUS__DOORBELL_ENABLE_MASK … macro
H A Dgc_9_4_3_sh_mask.h15146 #define CP_PQ_STATUS__DOORBELL_ENABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h3340 #define CP_PQ_STATUS__DOORBELL_ENABLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h16377 #define CP_PQ_STATUS__DOORBELL_ENABLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h18620 #define CP_PQ_STATUS__DOORBELL_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h18920 #define CP_PQ_STATUS__DOORBELL_ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h17268 #define CP_PQ_STATUS__DOORBELL_ENABLE_MASK … macro