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Searched refs:CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2663 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h2456 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h3522 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h3000 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19206 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT … macro
H A Dgc_9_1_sh_mask.h20517 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h20444 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h22572 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h12671 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h26546 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h27095 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h29046 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h25344 #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI__SHIFT … macro