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Searched refs:CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h1639 #define CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK 0x4000000 macro
H A Dgfx_8_1_sh_mask.h2623 #define CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK 0x4000000 macro
H A Dgfx_8_0_sh_mask.h2101 #define CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK 0x4000000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11452 #define CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h12932 #define CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h12717 #define CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_9_4_3_sh_mask.h14659 #define CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h2852 #define CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h15938 #define CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h18421 #define CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h18129 #define CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h16769 #define CP_ME2_PIPE2_INT_CNTL__TIME_STAMP_INT_ENABLE_MASK … macro