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Searched refs:CP_INT_STATUS__GENERIC1_INT_STAT_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2470 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK 0x40000000L macro
H A Dgfx_7_2_sh_mask.h1263 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK 0x40000000 macro
H A Dgfx_8_1_sh_mask.h2133 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK 0x40000000 macro
H A Dgfx_8_0_sh_mask.h1609 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK 0x40000000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10813 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK … macro
H A Dgc_9_1_sh_mask.h12294 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK … macro
H A Dgc_9_2_1_sh_mask.h12098 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK … macro
H A Dgc_9_4_3_sh_mask.h13823 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK … macro
H A Dgc_9_4_2_sh_mask.h2114 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK … macro
H A Dgc_11_0_0_sh_mask.h15245 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK … macro
H A Dgc_10_1_0_sh_mask.h17739 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK … macro
H A Dgc_11_0_3_sh_mask.h17400 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK … macro
H A Dgc_10_3_0_sh_mask.h15999 #define CP_INT_STATUS__GENERIC1_INT_STAT_MASK … macro