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Searched refs:CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2520 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK 0x00400000L macro
H A Dgfx_7_2_sh_mask.h1299 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK 0x400000 macro
H A Dgfx_8_1_sh_mask.h2181 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK 0x400000 macro
H A Dgfx_8_0_sh_mask.h1657 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK 0x400000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11137 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK … macro
H A Dgc_9_1_sh_mask.h12618 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK … macro
H A Dgc_9_2_1_sh_mask.h12422 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK … macro
H A Dgc_9_4_3_sh_mask.h14147 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK … macro
H A Dgc_9_4_2_sh_mask.h2438 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK … macro
H A Dgc_11_0_0_sh_mask.h15504 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK … macro
H A Dgc_10_1_0_sh_mask.h18094 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK … macro
H A Dgc_11_0_3_sh_mask.h17659 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK … macro
H A Dgc_10_3_0_sh_mask.h16358 #define CP_INT_STATUS_RING1__PRIV_INSTR_INT_STAT_MASK … macro