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Searched refs:CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2386 #define CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK 0x00080000L macro
H A Dgfx_7_2_sh_mask.h1199 #define CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK 0x80000 macro
H A Dgfx_8_1_sh_mask.h2055 #define CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK 0x80000 macro
H A Dgfx_8_0_sh_mask.h1531 #define CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK 0x80000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11035 #define CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h12516 #define CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h12320 #define CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_4_3_sh_mask.h14045 #define CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h2336 #define CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h17982 #define CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h16246 #define CP_INT_CNTL_RING1__CNTX_BUSY_INT_ENABLE_MASK … macro