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Searched refs:CP_INT_CNTL (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c4441 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CMP_BUSY_INT_ENABLE, 0); in gfx_v11_0_soft_reset()
4442 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 0); in gfx_v11_0_soft_reset()
4443 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CNTX_EMPTY_INT_ENABLE, 0); in gfx_v11_0_soft_reset()
4444 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, GFX_IDLE_INT_ENABLE, 0); in gfx_v11_0_soft_reset()
4541 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CMP_BUSY_INT_ENABLE, 1); in gfx_v11_0_soft_reset()
4542 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 1); in gfx_v11_0_soft_reset()
4543 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CNTX_EMPTY_INT_ENABLE, 1); in gfx_v11_0_soft_reset()
4544 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, GFX_IDLE_INT_ENABLE, 1); in gfx_v11_0_soft_reset()
4881 data = REG_SET_FIELD(data, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 1); in gfx_v11_0_update_coarse_grain_clock_gating()
4883 data = REG_SET_FIELD(data, CP_INT_CNTL, CMP_BUSY_INT_ENABLE, 1); in gfx_v11_0_update_coarse_grain_clock_gating()
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H A Dgfx_v8_0.c6549 WREG32_FIELD(CP_INT_CNTL, CP_ECC_ERROR_INT_ENABLE, enable_flag); in gfx_v8_0_set_cp_ecc_int_state()
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmu73_discrete.h481 uint32_t CP_INT_CNTL; member
H A Dsmu72_discrete.h499 uint32_t CP_INT_CNTL; member
H A Dsmu74_discrete.h490 uint32_t CP_INT_CNTL; member
H A Dsmu75_discrete.h501 uint32_t CP_INT_CNTL; member
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dnid.h494 #define CP_INT_CNTL 0xC124 macro
H A Devergreend.h1246 #define CP_INT_CNTL 0xc124 macro
H A Dr600d.h714 #define CP_INT_CNTL 0xc124 macro
H A Dni.c1383 WREG32(CP_INT_CNTL, cp_int_cntl); in cayman_cp_int_cntl_setup()
H A Dr600.c3622 WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in r600_disable_interrupt_state()
3873 WREG32(CP_INT_CNTL, cp_int_cntl); in r600_irq_set()
H A Devergreen.c4473 WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in evergreen_disable_interrupt_state()
4568 WREG32(CP_INT_CNTL, cp_int_cntl); in evergreen_irq_set()