Home
last modified time | relevance | path

Searched refs:CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3345 #define CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK 0x300000 macro
H A Dgfx_8_0_sh_mask.h3961 #define CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK 0x300000 macro
H A Dgfx_8_1_sh_mask.h4483 #define CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK 0x300000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12911 #define CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK … macro
H A Dgc_9_2_1_sh_mask.h14080 #define CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK … macro
H A Dgc_9_1_sh_mask.h14215 #define CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK … macro
H A Dgc_9_4_3_sh_mask.h16444 #define CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK … macro
H A Dgc_9_4_2_sh_mask.h4012 #define CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK … macro
H A Dgc_11_0_0_sh_mask.h17391 #define CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK … macro
H A Dgc_11_0_3_sh_mask.h19630 #define CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK … macro
H A Dgc_10_1_0_sh_mask.h20326 #define CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK … macro
H A Dgc_10_3_0_sh_mask.h18479 #define CP_HQD_PQ_CONTROL__MIN_AVAIL_SIZE_MASK … macro