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Searched refs:CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3349 #define CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK 0x3000000 macro
H A Dgfx_8_0_sh_mask.h3965 #define CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK 0x1000000 macro
H A Dgfx_8_1_sh_mask.h4487 #define CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK 0x1000000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12913 #define CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_9_2_1_sh_mask.h14082 #define CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_9_1_sh_mask.h14217 #define CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_9_4_3_sh_mask.h16447 #define CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_9_4_2_sh_mask.h4015 #define CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_11_0_0_sh_mask.h17394 #define CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_11_0_3_sh_mask.h19633 #define CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_10_1_0_sh_mask.h20328 #define CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_10_3_0_sh_mask.h18481 #define CP_HQD_PQ_CONTROL__CACHE_POLICY_MASK … macro