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Searched refs:CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3254 #define CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT 0x8 macro
H A Dgfx_8_0_sh_mask.h3874 #define CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT 0x8 macro
H A Dgfx_8_1_sh_mask.h4396 #define CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT 0x8 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12754 #define CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h13923 #define CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT … macro
H A Dgc_9_1_sh_mask.h14058 #define CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h16284 #define CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h3854 #define CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h24747 #define CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h27186 #define CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h20159 #define CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18314 #define CP_HPD_ROQ_OFFSETS__PQ_OFFSET__SHIFT … macro