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Searched refs:CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2111 #define CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK 0x10 macro
H A Dgfx_8_0_sh_mask.h2633 #define CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK 0x10 macro
H A Dgfx_8_1_sh_mask.h3155 #define CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK 0x10 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h719 #define CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK … macro
H A Dgc_9_2_1_sh_mask.h607 #define CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK … macro
H A Dgc_9_1_sh_mask.h618 #define CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK … macro
H A Dgc_9_4_3_sh_mask.h648 #define CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK … macro
H A Dgc_9_4_2_sh_mask.h1237 #define CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK … macro
H A Dgc_11_0_0_sh_mask.h6105 #define CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK … macro
H A Dgc_11_0_3_sh_mask.h6880 #define CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK … macro
H A Dgc_10_1_0_sh_mask.h6162 #define CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK … macro
H A Dgc_10_3_0_sh_mask.h6415 #define CP_CPF_STATUS__ROQ_ALIGN_BUSY_MASK … macro