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Searched refs:CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h1866 #define CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT 0x8 macro
H A Dgfx_8_0_sh_mask.h1344 #define CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT 0x8 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10543 #define CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT … macro
H A Dgc_9_1_sh_mask.h12024 #define CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h11831 #define CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h13557 #define CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1845 #define CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h14960 #define CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h17452 #define CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h17112 #define CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h15718 #define CP_CPC_MGCG_SYNC_CNTL__WARMUP_PERIOD__SHIFT … macro