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Searched refs:CPU_ATTR_SPI0_CS1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-mvebu/include/mach/
H A Dcpu.h52 CPU_ATTR_SPI0_CS1 = 0x5e, enumerator
/openbmc/u-boot/board/theadorable/
H A Dtheadorable.c177 CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_SPI0_CS1); in board_init()