Home
last modified time | relevance | path

Searched refs:CPUINFO_ZICOND (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/util/
H A Dcpuinfo-riscv.c36 unsigned left = CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZICOND; in cpuinfo_init()
51 info |= CPUINFO_ZICOND; in cpuinfo_init()
69 info |= pair.value & RISCV_HWPROBE_EXT_ZICOND ? CPUINFO_ZICOND : 0; in cpuinfo_init()
70 left &= ~CPUINFO_ZICOND; in cpuinfo_init()
102 if (left & CPUINFO_ZICOND) { in cpuinfo_init()
107 info |= got_sigill ? 0 : CPUINFO_ZICOND; in cpuinfo_init()
108 left &= ~CPUINFO_ZICOND; in cpuinfo_init()
/openbmc/qemu/host/include/riscv/host/
H A Dcpuinfo.h12 #define CPUINFO_ZICOND (1u << 3) macro
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.c.inc1069 if (!(cpuinfo & CPUINFO_ZICOND) && (!c_cmp2 || cmp2 == 0)) {
1078 if (cpuinfo & CPUINFO_ZICOND) {