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Searched refs:CPUCFG_CX_CTRL_REG0_L2_RST_DISABLE_A7 (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/arch/arm/mach-sunxi/
H A Dmc_smp.c40 #define CPUCFG_CX_CTRL_REG0_L2_RST_DISABLE_A7 BIT(4) macro
313 reg &= ~CPUCFG_CX_CTRL_REG0_L2_RST_DISABLE_A7; in sunxi_cluster_powerup()