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Searched refs:CPSR_T (Results 1 – 10 of 10) sorted by relevance

/openbmc/qemu/bsd-user/arm/
H A Dtarget_arch_thread.h47 cpsr_write(env, (entry & 1) * CPSR_T, CPSR_T, CPSRWriteByInstr); in target_thread_set_upcall()
62 regs->ARM_cpsr |= CPSR_T; in target_thread_init()
H A Dsignal.c58 cpsr_write(env, (ka->_sa_handler & 1) * CPSR_T, CPSR_T, CPSRWriteByInstr); in set_sigtramp_args()
165 mask = cpsr & CPSR_T ? 0x1 : 0x3; in set_mcontext()
/openbmc/qemu/linux-user/arm/
H A Dsignal.c203 cpsr |= CPSR_T; in setup_return()
205 cpsr &= ~CPSR_T; in setup_return()
248 cpsr_write(env, cpsr, CPSR_IT | CPSR_T | CPSR_E, CPSRWriteByInstr); in setup_return()
/openbmc/qemu/target/arm/
H A Dcpu.h1396 #define CPSR_T (1U << 5) macro
1420 #define CACHED_CPSR_BITS (CPSR_T | CPSR_AIF | CPSR_GE | CPSR_IT | CPSR_Q \
1425 #define CPSR_EXEC (CPSR_T | CPSR_IT | CPSR_J | CPSR_IL)
H A Dmachine.c763 if (val & CPSR_T) { in get_cpsr()
H A Dinternals.h1245 valid |= CPSR_T; in aarch32_cpsr_valid_mask()
H A Dcpu.c1453 psr & CPSR_T ? 'T' : 'A', in arm_cpu_dump_state()
H A Dhelper.c10537 if (mask & CPSR_T) { in cpsr_write()
10538 env->thumb = ((val & CPSR_T) != 0); in cpsr_write()
/openbmc/qemu/target/arm/tcg/
H A Dhelper-a64.c840 if (spsr & CPSR_T) { in HELPER()
/openbmc/qemu/linux-user/
H A Delfload.c355 regs->uregs[16] |= CPSR_T; in init_thread()