Searched refs:CPSR_M (Results 1 – 9 of 9) sorted by relevance
598 if ((env->uncached_cpsr & CPSR_M) == mode) { in HELPER() 607 if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_SYS) { in HELPER() 615 if ((env->uncached_cpsr & CPSR_M) == mode) { in HELPER() 630 int curmode = env->uncached_cpsr & CPSR_M; in msr_mrs_banked_exc_checks() 694 if (tgtmode == (env->uncached_cpsr & CPSR_M)) { in HELPER() 733 if (tgtmode == (env->uncached_cpsr & CPSR_M)) { in HELPER()
720 switch (spsr & CPSR_M) { in el_from_spsr()
7108 mask |= CPSR_M; in trans_CLREX()
156 if ((cpsr & CPSR_M) != ARM_CPU_MODE_USR || in set_mcontext()
10681 ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_HYP ||10704 (env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_MON && in switch_mode() 10734 (mask & (CPSR_M | CPSR_E | CPSR_IL));10820 ((env->uncached_cpsr ^ val) & mask & CPSR_M)) { in arm_phys_excp_target_el() 10821 if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR) { in arm_phys_excp_target_el() 10829 mask &= ~CPSR_M; in arm_log_exception() 10830 } else if (bad_mode_switch(env, val & CPSR_M, write_type)) { in arm_log_exception() 10840 mask &= ~CPSR_M; in arm_log_exception() 10857 switch_mode(env, val & CPSR_M); in arm_log_exception() 10896 old_mode = env->uncached_cpsr & CPSR_M; in aarch64_sync_32_to_64() [all...]
2128 i = bank_number(env->uncached_cpsr & CPSR_M); in kvm_arch_put_registers()2321 i = bank_number(env->uncached_cpsr & CPSR_M); in kvm_arch_get_registers()
1398 #define CPSR_M (0x1fU)2512 (env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_MON) { in arm_is_el3_or_mon() 1395 #define CPSR_M global() macro
673 cpsr_write(env, mode_for_el[target_el], CPSR_M, CPSRWriteRaw); in arm_emulate_firmware_reset() 1443 (psr & CPSR_M) != ARM_CPU_MODE_MON) { in arm_cpu_dump_state()
1242 uint32_t valid = CPSR_M | CPSR_AIF | CPSR_IL | CPSR_NZCV; in aarch32_cpsr_valid_mask()