Home
last modified time | relevance | path

Searched refs:CPSR_IL (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dhflags.c183 if (env->uncached_cpsr & CPSR_IL) { in rebuild_hflags_a32()
/openbmc/qemu/target/arm/
H A Dcpu.h1406 #define CPSR_IL (1U << 20)
1428 #define CPSR_EXEC (CPSR_T | CPSR_IT | CPSR_J | CPSR_IL)
1403 #define CPSR_IL global() macro
H A Dinternals.h1242 uint32_t valid = CPSR_M | CPSR_AIF | CPSR_IL | CPSR_NZCV; in aarch32_cpsr_valid_mask()
H A Dhelper.c10734 (mask & (CPSR_M | CPSR_E | CPSR_IL));
10843 mask |= CPSR_IL; in arm_log_exception()
10844 val |= CPSR_IL; in arm_log_exception()
11327 env->uncached_cpsr &= ~(CPSR_IL | CPSR_J); in arm_cpu_do_interrupt_aarch32()