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Searched refs:CPSR_GE (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/arm/
H A Dcpu.h1405 #define CPSR_GE (0xfU << 16)
1423 #define CACHED_CPSR_BITS (CPSR_T | CPSR_AIF | CPSR_GE | CPSR_IT | CPSR_Q \
1426 #define CPSR_USER (CPSR_NZCV | CPSR_Q | CPSR_GE | CPSR_E)
1434 #define XPSR_GE CPSR_GE
1402 #define CPSR_GE global() macro
H A Dmachine.c762 newval &= (CPSR_NZCV | CPSR_Q | CPSR_IT | CPSR_GE); in get_cpsr()
H A Dinternals.h1251 valid |= CPSR_E | CPSR_GE; in aarch32_cpsr_valid_mask()
H A Dhelper.c10756 if (mask & CPSR_GE) {