| /openbmc/linux/Documentation/devicetree/bindings/powerpc/4xx/ |
| H A D | cpm.txt | 1 PPC4xx Clock Power Management (CPM) node
9 - er-offset : All 4xx SoCs with a CPM controller have
10 one of two different order for the CPM
11 registers. Some have the CPM registers
18 in CPM will be set to turn off unused
22 in CPM will be set to turn off unused
23 devices. This is usually just CPM[CPU].
26 in CPM will be set on standby and
30 in CPM will be set on suspend (mem) and
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| /openbmc/linux/drivers/soc/fsl/qe/ |
| H A D | Kconfig | 14 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
37 tristate "CPM TSA support"
39 depends on CPM1 || (CPM && COMPILE_TEST)
41 Freescale CPM Time Slot Assigner (TSA)
48 tristate "CPM QMC support"
50 depends on CPM1 || (FSL_SOC && CPM && COMPILE_TEST)
53 Freescale CPM QUICC Multichannel Controller
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| /openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| H A D | cpm.txt | 7 * Root CPM node
22 * Properties common to multiple CPM/QE devices
25 to specify the device on which a CPM command operates.
38 The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
47 CPM-side offsets with pointer subtraction. It is recommended that
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| H A D | fsl,cpm1-scc-qmc.yaml | 7 title: PowerQUICC CPM QUICC Multichannel Controller (QMC)
38 description: SCC interrupt line in the CPM interrupt controller
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| H A D | qe.txt | 5 in with the CPM binding later in this document.
17 - model : precise model of the QE, Can be "QE", "CPM", or "CPM2"
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| H A D | fsl,cpm1-tsa.yaml | 7 title: PowerQUICC CPM Time-slot assigner (TSA) controller
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| /openbmc/linux/Documentation/devicetree/bindings/pci/ |
| H A D | xilinx-versal-cpm.yaml | 7 title: CPM Host Controller device tree for Xilinx Versal SoCs
23 - description: CPM system level control and status registers.
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-platform-devices-ampere-smpro | 37 …| CPM (core) | 0 | 0 | Snoop-Logic | CPM # …
39 …| CPM (core) | 0 | 2 | Armv8 Core 1 | CPM # …
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| /openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/ |
| H A D | pincfg.txt | 24 QE and two options for CPM.
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| H A D | ucc.txt | 18 CPM UART driver, the port-number is required for the QE UART driver.
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| /openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/ |
| H A D | i2c.txt | 3 The I2C controller is expressed as a bus under the CPM node.
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| /openbmc/linux/arch/powerpc/platforms/8xx/ |
| H A D | Kconfig | 4 select CPM
94 menu "MPC8xx CPM Options"
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| /openbmc/linux/arch/powerpc/ |
| H A D | Kconfig.debug | 242 bool "Early serial debugging for Freescale CPM-based serial ports"
246 using a CPM-based serial port. This assumes that the bootwrapper
247 has run, and set up the CPM in a particular way.
352 hex "CPM UART early debug transmit descriptor address"
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| H A D | Kconfig | 1121 PPC4xx Clock Power Management (CPM) support (suspend/resume).
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| /openbmc/linux/arch/arm64/boot/dts/marvell/ |
| H A D | armada-8040-mcbin.dtsi | 65 /* CON15,16 - CPM lane 4 */
245 /* CPM Lane 5 - U29 */
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| H A D | armada-7040-db.dts | 146 * SPI on CPM and NAND have common pins on this board. We can
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| H A D | armada-cp11x.dtsi | 474 * this controller is only usable on the CPM
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| /openbmc/linux/Documentation/devicetree/bindings/gpio/ |
| H A D | 8xxx_gpio.txt | 3 This is for the non-QE/CPM/GUTs GPIO controllers as found on
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| /openbmc/linux/drivers/pci/controller/ |
| H A D | pcie-xilinx-cpm.c | 105 CPM, enumerator
635 .version = CPM,
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| H A D | Kconfig | 338 bool "Xilinx Versal CPM PCI controller"
343 Xilinx Versal CPM host bridge.
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| /openbmc/linux/arch/powerpc/platforms/ |
| H A D | Kconfig | 255 select CPM
276 config CPM config
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | rk3399-gru.dtsi | 744 * Since our pcie doesn't support ClockPM(CPM), we want
746 * de-assert it along and make ClockPM(CPM) work.
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| /openbmc/linux/drivers/usb/gadget/udc/ |
| H A D | Kconfig | 316 tristate "Freescale QE/CPM USB Device Controller"
317 depends on FSL_SOC && (QUICC_ENGINE || CPM)
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| /openbmc/linux/drivers/tty/serial/ |
| H A D | Kconfig | 764 tristate "CPM SCC/SMC serial port support"
772 bool "Support for console on CPM SCC/SMC serial port"
776 Say Y here if you wish to use a SCC or SMC CPM UART as the system
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| /openbmc/u-boot/doc/ |
| H A D | README.POST | 697 MPC8xx communication processor module (CPM) will be tested:
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