Searched refs:CPG_PL5_SDIV (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/drivers/clk/renesas/ | ||
H A D | rzg2l-cpg.h | 27 #define CPG_PL5_SDIV (0x420) macro |
H A D | rzg2l-cpg.c | 375 priv->base + CPG_PL5_SDIV); in rzg2l_cpg_dsi_div_set_rate() |