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Searched refs:CPG_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2246 #define CPG_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT 0xa macro
H A Dgfx_8_1_sh_mask.h3314 #define CPG_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT 0xa macro
H A Dgfx_8_0_sh_mask.h2792 #define CPG_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT 0xa macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h30854 #define CPG_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h30859 #define CPG_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h33463 #define CPG_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h29107 #define CPG_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro