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Searched refs:CPG_DIV6_DIV (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/drivers/clk/renesas/
H A Dclk-div6.c23 #define CPG_DIV6_DIV(d) ((d) & 0x3f) macro
52 | CPG_DIV6_DIV(clock->div - 1); in cpg_div6_clock_enable()
160 writel(val | CPG_DIV6_DIV(clock->div - 1), clock->reg); in cpg_div6_clock_set_rate()