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Searched refs:CP0_WATCHHI (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/mips/cpu/
H A Dstart.S40 mtc0 t1, CP0_WATCHHI,\sel
41 mfc0 t0, CP0_WATCHHI,\sel
195 mtc0 zero, CP0_WATCHHI
/openbmc/u-boot/arch/mips/include/asm/
H A Dmipsregs.h63 #define CP0_WATCHHI $19 macro
/openbmc/linux/arch/mips/include/asm/
H A Dmipsregs.h84 #define CP0_WATCHHI $19 macro