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Searched refs:CP0_STATUS (Results 1 – 25 of 26) sorted by relevance

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/openbmc/linux/arch/mips/include/asm/
H A Dstackframe.h198 mfc0 k0, CP0_STATUS
254 mfc0 v1, CP0_STATUS
277 mfc0 k0, CP0_STATUS
358 mfc0 a0, CP0_STATUS
362 mtc0 a0, CP0_STATUS
368 mtc0 v0, CP0_STATUS
396 mfc0 a0, CP0_STATUS
399 mtc0 a0, CP0_STATUS
406 mtc0 v0, CP0_STATUS
452 mfc0 t0, CP0_STATUS
[all …]
H A Dpm.h34 mfc0 k0, CP0_STATUS
44 mtc0 k0, CP0_STATUS
H A Dasmmacro.h59 mfc0 \reg, CP0_STATUS
61 mtc0 \reg, CP0_STATUS
71 mfc0 \reg, CP0_STATUS
74 mtc0 \reg, CP0_STATUS
/openbmc/linux/drivers/soc/bcm/brcmstb/pm/
H A Ds3-mips.S40 mfc0 t1, CP0_STATUS
68 mfc0 t0, CP0_STATUS
73 mtc0 t0, CP0_STATUS
78 mtc0 t0, CP0_STATUS
131 mtc0 t1, CP0_STATUS
H A Ds2-mips.S85 mfc0 t0, CP0_STATUS
92 mtc0 t0, CP0_STATUS
97 mtc0 t0, CP0_STATUS
167 mtc0 s6, CP0_STATUS
/openbmc/linux/arch/mips/kernel/
H A Dbmips_vec.S52 mtc0 k0, CP0_STATUS
89 mfc0 k0, CP0_STATUS
114 mfc0 k0, CP0_STATUS
118 mtc0 k0, CP0_STATUS
175 mtc0 k0, CP0_STATUS
259 mfc0 k0, CP0_STATUS
262 mtc0 k0, CP0_STATUS
H A Dr4k_switch.S29 mfc0 t1, CP0_STATUS
49 mfc0 t1, CP0_STATUS /* Do we really need this? */
56 mtc0 a2, CP0_STATUS
H A Dr2300_switch.S33 mfc0 t1, CP0_STATUS
54 mfc0 t1, CP0_STATUS /* Do we really need this? */
61 mtc0 a2, CP0_STATUS
H A Dhead.S37 mfc0 t0, CP0_STATUS
40 mtc0 t0, CP0_STATUS
H A Dr4k_fpu.S45 mfc0 t0, CP0_STATUS
57 mfc0 t0, CP0_STATUS
112 mfc0 t0, CP0_STATUS
180 mfc0 t0, CP0_STATUS
H A Dcps-vec.S100 mfc0 k0, CP0_STATUS
117 mtc0 t0, CP0_STATUS
466 mttc0 zero, CP0_STATUS
H A Dgenex.S164 mfc0 k0, CP0_STATUS
451 mfc0 k0, CP0_STATUS
455 mtc0 k0, CP0_STATUS
H A Docteon_switch.S26 mfc0 t1, CP0_STATUS
79 mfc0 t1, CP0_STATUS /* Do we really need this? */
86 mtc0 a2, CP0_STATUS
H A Dcps-vec-ns16550.S199 DUMP_COP0_REG(CP0_STATUS, "Status: 0x", 32, mfc0)
/openbmc/u-boot/arch/mips/lib/
H A Dgenex.S73 mfc0 v1, CP0_STATUS
137 mfc0 a0, CP0_STATUS
140 mtc0 a0, CP0_STATUS
147 mtc0 v0, CP0_STATUS
/openbmc/u-boot/board/qemu-mips/
H A Dlowlevel_init.S19 mtc0 t1, CP0_STATUS
/openbmc/linux/arch/mips/dec/prom/
H A Dlocore.S20 mfc0 k0, CP0_STATUS
/openbmc/linux/arch/mips/mm/
H A Dcex-oct.S40 mfc0 k1, CP0_STATUS
H A Dcex-sb1.S142 mfc0 k0, CP0_STATUS
/openbmc/linux/arch/mips/kvm/
H A Dfpu.S27 mfc0 t0, CP0_STATUS
71 mfc0 t0, CP0_STATUS
/openbmc/u-boot/arch/mips/cpu/
H A Dstart.S158 4: mfc0 t0, CP0_STATUS
161 mtc0 t0, CP0_STATUS
/openbmc/linux/arch/mips/alchemy/common/
H A Dsleeper.S45 mfc0 k0, CP0_STATUS
231 mtc0 k0, CP0_STATUS
/openbmc/u-boot/arch/mips/mach-jz47xx/
H A Dstart.S37 mtc0 t0, CP0_STATUS
/openbmc/linux/arch/mips/dec/
H A Dint-handler.S133 mfc0 t1,CP0_STATUS
/openbmc/u-boot/arch/mips/include/asm/
H A Dmipsregs.h52 #define CP0_STATUS $12 macro

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