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Searched refs:CP0_REG17__LLADDR (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu.h383 #define CP0_REG17__LLADDR 0 macro
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c5155 case CP0_REG17__LLADDR: in gen_mfhc0()
5245 case CP0_REG17__LLADDR: in gen_mthc0()
5791 case CP0_REG17__LLADDR: in gen_mfc0()
6525 case CP0_REG17__LLADDR: in gen_mtc0()
7267 case CP0_REG17__LLADDR: in gen_dmfc0()
7986 case CP0_REG17__LLADDR: in gen_dmtc0()